The present invention relates to an instruction processing apparatus for executing a program stored in a main memory at the level of a microprogram.
An example of a prior instruction processing apparatus of the microprogam type is illustrated in FIG. 1. The instruction processing apparatus comprises a main memory 10, an instruction control section 12, a register section 14, and an instruction executing section 16. The main memory 10 stores a user program containing a set of so-called user instructions. User instructions read from the main memory 10 are transferred to the instruction control section 12 through a data bus 18. The instruction control section 12 comprises an instruction register 22, a control store 24, a micro sequencer 26, and a micro data register 28. The user instruction transferred from the main memory 10 to the instruction control section 12 is stored in the instruction register 22. The contents (normally, an operation code of the user instruction) in a given field of the instruction in the instruction register 22 is supplied to the control store 24 as a microaddress. Then, a microinstruction stored in an accessed address in the control store 24 is read and loaded in the micro data register 28. The microinstruction read out controls various types of hardware such as the register section 14, the instruction executing section 16, and the like. When a plurality of microinstructions are required for executing one user instruction, a microaddress is increased by the micro sequencer 26 to designate a microaddress indicating an address in which the next microinstruction is stored. The contents in a given field in a microinstruction in the micro data register 28 is transferred through a control bus 20 to the register section 14 and the instruction executing section 16, so that the user instruction is performed at the level of the microprogram.
Instruction processing apparatus of the microprogram type have been applied to a variety of fields with an improvement in the integration density of the semiconductor memory and the operation speed of the semiconductor memory used for the control store. One of the applications is to partially turn the operating system into firmware. In this application, of various functions processed by the operating system (generally by software), for example, a service program prepared in the form of subroutine, is effected by firmware or microprogram. This approach reduces the access time to the main memory, thereby improving the efficiency of the instruction processing. To this end, the use of an additional user instruction to execute a service program (consisting of a set of user instructions) of the operating system has been proposed. For discriminating the additional user instruction from the ordinary user instruction, the former will be referred to as a high performance instruction and the latter a low performance instruction. That is, the high performance instruction has the same function as that of a set of the low performance instructions. To additionally provide the high performance instruction, a set of the low performance instructions replaceable by one high performance instruction must be converted into a set of microinstructions. The conventional control store can convert a user instruction into a set of microinstructions. But it can not convert a set of user instructions into a set of microinstructions. Therefore, for additionally providing the high performance instruction, a microprogram corresponding to this instruction must also be provided additionally. This requires a redesign of the firmware, and makes it difficult to provide the additional high performance instruction.